The FACOM U-200 was Fujitsu's 16-bit minicomputer for multi-purpose control. It was announced in August 1972 as the successor of the company's first minicomputer, the FACOM R (announced in March 1969), and the FACOM RE (an enhanced version of the FACOM R announced in August 1971). It was developed with a focus on control functionality and expandability as a computer for industry.
With the establishment of Panafacom (currently PFU) -- formed by Fujitsu, Fuji Electric and the Matsushita Group on July 2, 1973 -- development and manufacturing of minicomputers was shifted to Panafacom, and the name was changed to PANAFACOM U-200. Subsequently, Panafacom (currently PFU) added the PANAFACOM U-300 and U-400 as higher end machines, and the PANAFACOM U-100 (Japan's first LSI minicomputer) as a lower end machine, thereby completing the PANAFACOM U-100 Series.
The MACC 16-bit minicomputer, developed and manufactured by Matsushita Communication Industrial (currently Panasonic Mobile Communications) was taken over by Panafacom, but as part of the development policy of the new company, it was decided to use the FACOM U-200 as the basis for the next model, and development of the MACC was ended.
| PANAFACOM U-100 |
FACOM (PANAFACOM) U-200 |
PANAFACOM U-300 |
PANAFACOM U-400 |
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|---|---|---|---|---|---|
| Announcement date | June 1975 | August 1972 | December 1974 | ||
| Memory unit | Memory element |
Magnetic core, IC memory | |||
| Word length | 16bit + 2 parity | ||||
| Cycle time | Magnetic core 1.5µs IC memory 0.6µs |
Magnetic core 0.65/0.75µs IC memory 0.75µs |
|||
| Memory capacity |
8-64KB | 64-256KB | |||
| Memory protection |
- | Optional (1KB units) |
Standard (1KB units) |
||
| Arithmetic control section |
Architecture | 16-bit CPU with proprietary architecture | |||
| Number of instructions |
89 | 89 (Including options) |
103 (Including options) |
108 (Including options) |
|
| Floating point operations | - | Optional | |||
| Interrupt levels | : Internal 2, External 4 | Internal 3, External 8, Special external 1 |
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| Fixed point addition/ subtraction speed |
2.8µs | 1.58µs | 0.8µs | ||
| Other | Input/ Output control |
Shared bus system, program control or DMA (Direct Memory Access) |
|||
| Initial program load |
Standard | Optional | Standard | ||
| Timer/ Programmer interrupts |
Standard | Optional | Standard | ||
(Note) The above specifications are from the time of announcement, and may have been changed due to later improvement.
