【NTT】 DIPS-11/5EX Series (DIPS-11/5EX, 15EX, 25EX, 45EX)

In the second half of 1986, the NTT Research Laboratory began studying the development of successor machines for the DIPS-11/5E series, with the aim of maintaining the same cost-performance ratio as commercial machines while maintaining and extending user program assets. The 5EX Series inherited, as is, a composite configuration based on a 100-Mbit/s optic loop from the 5E Series and otherwise minimized extension of the architecture. Hardware development went forward based on the exploitation of manufacturing company technology.

Development started at the beginning of 1988, and development of the 5EX, 15EX, 25EX, and 45EX went forward with the goal of improving the performance of each model in the 5E Series by 1.5 to 2 times. Prototyping finished between 1990 and 1991 (DIPS-11/5EX Series Main Specifications).

The 5EX Series realized a serial transfer system that used an optic interface as the channel technology and thereby enabled transfer speeds of 18 MB/second and a maximum cable length of about 2 km. This greatly exceeded the previous electric signal-based performance, i.e., a maximum transfer speed of about 5 MB/second and a maximum cable length of 120 m.

An independent I/O interface extension unit was developed to increase the high-speed optic loop interface distance, thus enabling usage transcending distance limitations and making it possible for users to access an information processing center from a remote site located several tens of kilometers away.

With the trend toward downsizing and the move toward general-purpose computer procurement based on MIA/SPIRIT specifications, the DIPS joint research (begun in 1969 by NTT, NEC, Hitachi, and Fujitsu) finished in March 1992, with the completion of development of the 5EX Series.

CCPs (DIPS CCP-IEX, CCP-IIEX) for the DIPS-11/5EX Series were developed in parallel.

DIPS-11/5EX Series Main Specifications
Item Model 5EX Model 15EX Model 25EX Model 45EX (Reference) DIPS-1
Performance (DIPS-11/10 ratio) 9 14 32 30 0.7
System   Number of CPUs 2 4 4
Maximum memory capacity (MB) 512 1024 16
Total number of channels 32 64 256 128 16
Processing unit
Number of instructions 220 160
Local memory capacity (KB) 64 256 128 8/16
Buffer memory capacity (KB) 512 1024
Main logic element (gate/chip) 2K ECL LSI 12K ECL LSI 12K ECL LSI 15K ECL LSI ECL SSI‚MSI
Memory unit
Control unit (MB) 32 64 1
Expansion unit (MB) 32 512 128 1
Memory element (b/chip) 4M DRAM 1M SRAM Magnetic core
Transfer unit
Channel types 6 types 12 types 4 types
Maximum throughput (MB/S) 96 283 400 768 12