The ACOS System 410, 430, 610, 630, 910 and 930 (hereafter abbreviated S410, S430, S610, S630, S910 and S930) were general-purpose computers covering a range from mini to large size, and providing support for information system networking.
After the ACOS Series, which was announced in 1974, computer development at NEC shifted focus to the company's own technology, and greater computer density and performance were achieved as semiconductor technology progressed.
As a mini machine, the S410 was announced in April 1983 as the successor of the ACOS System 250. In the S410, NEC used CMOS technology for the first time in its processors, and thereby achieved greater compactness.
The S410 was also equipped with office work support software, so it went beyond mere data processing, and was a computer suitable for building an integrated office automation system encompassing decision-making, clerical work and communication with other departments.
As a mid-size machine, the S430 was announced as the successor of the ACOS System 350 in February 1984. The S430 used 256 kilobit DRAMs for the main memory unit, 16,000 gate CMOS custom LSIs for the central processing unit, and was equipped with a 4,400 gate CMOS gate arrays and other high density logic LSIs employing CMOS technology. Thus it had expanded functionality, and also achieved smaller size, higher speed, lower power consumption, and higher reliability.
The S430 inherited the architecture of the S350, and by adding features like paging capability and dynamic address transformation (DAT) for input/output channel operation, was able to find application in a wide range of fields, including data processing, office automation, CAD and R&D.
As large machines, the S610 and S630 were announced as successors of the ACOS system 450C550 in April 1985, and the S830, S910 and S930 were announced as successors of the high-end ACOS System 650, 750 and 850.
The S610 and S630 employed technology from the ultra-large ACOS System 1500 Series, such as bipolar logic LSI with a delay time per gate of 250 picosec and 300 gates per chip, bipolar logic LSI with a delay time per gate of 350 picosec and 2,000 gates per chip, 4 kilobit bipolar RAM with an access time of 10 nanosec, and 256 kilobit DRAM. This made it possible to achieve high performance while maintaining compactness, with a cabinet floor area of 1 square meter or less. Adding a high-speed scientific operation processor (HSP) and integrated array processor (IAP) enabled high-level scientific/technical calculation capability.
The S830, S910 and S930 employed technology from the ultra-large ACOS System 2000 Series, such as logic LSI with delay time per gate of 100 picosec and 1,000 gates per chip, logic LSI with a delay time per gate of 170 picosec and 4,000 gates per chip, 4 kilobit bipolar RAM with an access time of 10 nanosec, and 1 megabit DRAM. The price performance ratio was improved by employing technology to speed up the central processing unit, such as sophisticated pipeline techniques, and high-precision branch prediction methods.
These systems also used network functions compatible with OSI, which was being standardized internationally, and were equipped with software such as a remote file system which enabled support of e-mail systems conforming to MHS of CCITT, and FTAM of ISO. This made it possible to easily build connections between different models.
|Number of arithmetic processing units
|Max. main memory capacity
|Max. number of channels
|Max. data transfer speed
|Bipolar air cooled
|Bipolar air cooled