The first machine of NEAC-2206 was delivered to Hokkaido University in March 1962 as the successor of the NEAC-2203. It used core memory as internal memory, as well as for input/output and control of auxiliary memory devices, and this simplified peripheral devices, improved data transmission capabilities, and allowed format control to be done electronically. In addition to the previous regenerative amplifiers, no-delay amplifiers and non-logic simple amplifiers were developed for logic circuit elements, and this enabled design of the complex logic circuits necessary for achieving parallel operation and higher speed. The system also reduced the number of program steps by employing compound instructions (using 1-word/1-instruction for instruction words) and modification designation. It also advanced the interrupt capabilities developed with the NEAC-2203, and had comprehensive multi-programming and real-time processing capabilities.
This machine was announced in February 1962 as a product to meet the needs of users of the NEAC-2203 who wished to upgrade their obsolescent machines while retaining program assets. The NEC-2230 inherited the instruction codes of the NEAC-2203 while using, to the greatest extent possible, features developed for the NEAC-2206 (the successor of the NEAC-2203) -- such as core memory, multi-programming, electronic peripheral equipment and online capabilities. It had an internal memory capacity of 2,400 words, an access time of 5 microseconds, and up to three magnetic drums (10,000 words) could be directly connected as auxiliary memory. Arithmetic speed was 100 microseconds for addition/subtraction, 3,000 microseconds for multiplication and 5,900 microseconds for division. This machine was exhibited together with the NEAC-2206 at the first Japanese-made electronic computer show in November 1962.