Following the Cenju-3, the Cenju-4, announced in 1997, was a microprocessor-based parallel computer developed by NEC. The machine’s most distinctive design point was the dual memory architecture, consisting of distributed memory with a user-level messaging function and distributed shared memory with cache coherency control. The Cenju-4’s architecture consisted of eight to 1,024 nodes connected with a multistage network that had multicast synchronization functions. Figure 1 illustrates the system architecture of the Cenju-4.

Figure 1: System architecture of the Cenju-4

Figure 1: System architecture of the Cenju-4

The Cenju-4’s DE4 operating system was based on the MACH microkernel. Microkernel-based operating systems are well suited to functional extensions and additions because of their modular approach to implementing each function. For DE4, NEC added a user-level communications server, a distributed shared memory server, and other functions specific to parallel processing. As with the Cenju-3, the Cenju-4 was supplied with NEC’s proprietary Paralib/CJ4 parallel programming library and with Message Passing Interface (MPI), the industry standard library. NEC also decided that collaborations with the user community were key to enriching the parallel programming environment, and to this end, it actively released its source code and engaged in joint research through the NEC Parallel Processing Center.

Node specifications
Processor VR10000(200MHz)
Cache capacity Primary 32 KB (instructions) / 32 KB (data)
Secondary 1MB
Local memory 64 - 512 MB
Internal disk (optional) 2.1 GB or 4.3 GB

Hardware specifications
No. of nodes 8 to 1,024
Main memory size 0.5 - 512 GB
Inter-node network Multistage interconnection network
Inter-node transfer speeds 200 MB/s per node, bidirectional

NEC’s Cenju-4