【Toyohashi University of Technology】 SM-1 SIMD Parallel Computer

The SM-1 was a single-instruction multiple-data (SIMD) parallel computer developed between 1990 and 1993 by a Toyohashi University of Technology group led by Yuasa Taiichi. The SM name both referred to SIMD and took the initials of Sumitomo Metal, which helped with the development. The SM-1 ran as a coprocessor with 1,024 processing elements (PEs) and controlled by a front-end SUN 4. Each PE consisted of an ALU capable of 8-bit calculations, a 128-byte general-purpose register, and several dedicated registers. A specially designed LSI chip contained four PEs, and, with 16 chips per board, the entire computer was built from just 16 boards. Each chip had four megabytes of DRAM for a total of one gigabyte of memory. A sequencer converted coprocessor instructions sent from the SUN 4 into a microinstruction sequence. The sequence was then sent to all PEs and executed in parallel. The SM-1 could be transformed into a parallel computer with a different behavior by changing the microinstructions.

In terms of software, the SUN operating system was used, and UNIX could be used without modifications. The new software developments consisted of a SIMD simulator and a processing system for a dedicated assembler language and a high-level language. The high-level language was reminiscent of C with parallel execution functions; it was created by modifying the Gnu C compiler.

Two SM-1 prototype machines were built. One was used at the Toyohashi University of Technology for image processing, prime factorization, and formula processing with parallel Lisp, while the other was used at the Yasumura Research Group at Keio University for development of parallel Fortran. In performance terms, each PE could perform 860,000 32-bit additions per second, and the entire machine could do 860 million 32-bit additions per second. But because floating point operations were done in microcode instead of hardware, the SM-1 never reached its performance goals and its commercialization was abandoned.

Compiled from pp.200-201, "The History of Japanese Computers", edited by the Special Committee for the History of Computing, IPSJ. Ohmsha, 2010.

Toyohashi University of Technology's SM-1 SIMD parallel computer