The OKITACsystem50V was marketed in 1982 as the successor of the OKITACsystem50. Features of the OKITACsystem50V were: expansion of the logical space to 32 megabytes, a maximum memory capacity of 4 megabytes, cache memory, and greatly improved processing capacity.
The Model 15 was positioned at the bottom end of the series. This model employed a single-chip high-performance high-integration microprocessor, and also converted peripherals to LSI, so it was suitable for compact, low-cost, small-scale systems.
The Model 45 employed LSI and VLSI for greater compactness and lighter weight while maintaining high performance, and was positioned in the middle of the series.
The Model 65 was the high-end model of the series. It was a super minicomputer for large-scale systems, and it achieved high-performance and high-functionality using numerous LSI. There were 3 different operating systems -- RDOS (Real Time Disk Oriented System), RFOS (Real Time Floppy disk Oriented System) and RMOS (Real Time Memory Oriented System). A high-reliability system was built via duplication, and Japanese language processing was also provided.
| Model15 | Model45 | Model65 | ||
|---|---|---|---|---|
| Announcement date | May 1982 | May 1983 | May 1982 | |
| CPU | MOS-based VLSI, 1 chip | Combined use of MOS-type VLSI and bipolar-type LSI | Combined use of MOS-type VLSI and bipolar-type LSI | |
| Memory element | 256K nMOS IC | |||
| Cycle time | 800ns/2B | 645ns/4B | ||
| Data format | 16bit+6ECC | 32 bit+7ECC | ||
| Memory capacity | 256KB-2MB | 512KB-4MB | 512KB-8 MB | |
| Cache memory | - | - | 16KB | |
| Logical address space | 32MB | |||
| Number of instructions | 73 basic instructions, 34 optional instructions | |||
| Arithmetic speed*1 | Fixed point addition /subtraction 1.2µs | Fixed point addition /subtraction 0.39µs | Fixed point addition /subtraction 0.25µs | |
| Floating point addition /subtraction 16.0µs | Floating point addition /subtraction 1.90µs | Floating point addition /subtraction 1.75µs | ||
| Registers | 8 16bit general-purpose registers,2 32bit floating point registers, 8 16bit control registers, 8 16bit expansion control registers |
|||
| CPU mechanisms | Basic provided mechanisms | Interrupt mechanism, timer mechanism (x2), memory protection mechanism, automatic restart mechanism, IPL mechanism | ||
| Ventilation trouble detection mechanism, power supply trouble detection mechanism | ||||
| Floating point operation mechanism | added | |||
| Decimal operation mechanism | Added | |||
| Temperature trouble detection mechanism | added | |||
| Memory backup | added | |||
| Duplicated interface | - | added | ||
| High-speed DMA | - | - | 2.4MB/S | |
| Other | umber of connected input/output devices: 1,024 (Max.) | |||
