【NEC】 NEAC MS Series MS10, MS30, MS50

In 1978, NEC announced the NEAC MS Series. It employed a revolutionary architecture for a minicomputer, with features like Japan's first directly addressable 2 megabyte (1 megaword) memory, and was developed as Japan's first true processor for distributed processing. Together with the NCOS1 operating system, which was ideal for networked online processing, this series enabled applications in the distributed processing field, as well as in the communication network control and industrial control fields.

  • Distributed processing field: As a distributed processor and large terminal processor in NEC's DINA (Distributed Information-processing Network Architecture)
  • Communications control field: As a front-end network processor (FNP) data collection/distribution processor, and packet switching processor etc.
  • Industrial control field: As a processor for tasks such as system control, instrument analysis, machine control and process control
NEAC MS Series Main Specifications
  MS10 MS30 MS50
Announcement date December 1978 February 1978 February 1978
Memory Maximum memory capacity 64Kword 256Kword 1Mword
Word configuration 16 data bits + 6 ECC bits 16 data bits + 6 ECC bits, or 16 data bits + 2 parity bits
Cycle time 700ns 700ns 465ns
Error correction ECC (Automatic error detection/correction)
Memory element IC(nMOS)
Arithmetic Control system Microprogram
Number of instructions Basic 122 Basic 124
Arithmetic system Binary parallel, fixed point
Floating point (Optional)
Decimal operations (Optional) -
Registers 26
Interrupt levels 64
Other mechanisms Boot load mechanism Standard
Stack/Queue processing mechanism Standard
Scientific operation mechanism optional
Memory protection mechanism Standard optional Standard