The Ministry of International Trade and Industry started their project on high-speed calculation for science and engineering (commonly known as their "Supercomputer Project") in 1981. For nine years, this project developed basic technology for building supercomputers, which were expected to see tremendous demand growth in the 1990s.
In terms of device technology, the project developed gallium arsenide (GaAs) and Josephson junction (JJ) elements. Using MESFET GaAs elements, the project developed 4Kgate 10ns and 2.6Kgate 0.7ns logic elements and 4Kbit memory elements with 1.5ns access time and 16Kbit elements with 5.0ns access time. With HEMT GaAs elements, the project developed 1Kgate 36ps bus driver elements. Using JJ elements, the project created a 4-bit computer comprised of 2 chips and an 8-bit DSP (clock frequency 1GHz or higher in both cases) as logic elements. A 4Kbit chip with 580ps access time was developed as a memory element.
In the area of systems technology, research and development was conducted on parallel processing systems, and development was also done on the data driven system SIGMA-1, the multi vector system PHI and a satellite image processing system
- a)PHI (Parallel, Hierarchical and Intelligent): The main unit HPP (High speed Parallel Processor) had 4 element processors, each of which was a high-speed vector supercomputer, and these were operated in parallel by a CMU (Common Mapping Unit). Memory was comprised of local memory for element processors, a CSU (Common Storage System) and LHS (Large capacity High Speed Storage) in a hierarchical structure. LHS had capacity of 4GB, which appeared to be a 1-dimensional file from the processor side. Maximum performance of PHI was verified to exceed 10GFLOPS.
- b)Satellite image processing system: This was comprised of 3 subsystems -- SIMD, MIMD and a mixture of the two. A CAP (Cellular Array Processor) comprised of 4,096 element processors and using the SIMD system was developed for raw data processing. A MIMD type VPP (Variable Processor Pipeline) comprised of 8 element processors coupled in a matrix-style network was developed for higher level processing of images, and GaAs elements were used on a trial basis to increase speed. A high-speed 3-dimensional image display unit employing both MIMD and SIMD concepts was developed for high-speed display, and HEMT elements were used in some parts of this system.