The EVLIS Machine was proposed and announced in 1979 by the Department of Applied Physics, Faculty of Engineering, Osaka University. It was a multiprocessor-based parallel processing computer for Lisp programs, and was eventually realized and put into operation in 1982. It had execution performance competitive with ultra-large general-purpose machines of the time, including those which were foreign made, and the results of this research were recognized with the Best Paper Award of the Information Processing Society of Japan. The laboratory had a history of building vacuum tube computers, and in the later 1960s, it researched and built things like Lisp processing systems on general-purpose computers. It was believed that thought was done associatively and in parallel, and thus the plan called for parallel processing of Lisp programs using multiple processors. Concrete research began in 1978, with the establishment of Lisp parallel processing as a Master's Thesis topic. The research laboratory was a center for discussing research, and what emerged from the reports were things like parallel processing of the first parameter of the function "evlis". This was adopted as the name of the EVLIS machine, and work began on Lisp parallel processing.
In 1979, it was proposed that a new processor called EVAL II be independently researched, fabricated and used to achieve a high-performance architecture for Lisp in a parallel environment. Three Master's candidates took charge of the design and fabrication of EVLIS and EVAL II. Saito Toshifumi (at the time an assistant at Osaka University) provided software support, and Yasui Hiroshi (at the time an Assistant Professor of Osaka University) provided hardware and overall support. Fabrication began in April 1980, and a benchmark program was run at the Osaka University Signal Processing Research Group in January 1982. The fabrication cost of the machine was approximately ¥3 million for the entire system, including approx. 2,500 ICs.
In addition to list processing, the EVLIS machine performed parallel processing using the EVAL II processors to handle all the problems accompanying greater parallelism (such as allocation of processing to multiple processors, synchronization between processors, and correct propagation of function side-effects where the list structure is rewritten). Therefore, the EVLIS machine could automatically perform parallel processing, even if a program was written according to the syntax of Lisp 1.5 but was not aware of the use of parallelism.
During the development of the EVLIS machine, it exhibited performance surpassing that of other dedicated Lisp machines which existed at the time, even when the EVLIS Lisp machine was configured using a single EVAL II. Results were also obtained which rivaled execution speed with the M200-H, which was the fastest at the large computer centers of the time. The main features of the architecture included: 8kw of 48-bit microinstructions, elimination of the distinction between the data bus and address bus, parallel 3-address ALU operations and branch operations within a single instruction, high-speed dispatch capability, 4kw of scratchpad memory, and a CAR-CDR operation feature which worked in parallel with other operations. A diagnostic interface was provided in hardware, and this allowed direct observation of the content of elements like buffers and registers while execution was in progress. In addition to shared memory, the EVLIS machine was equipped with a q-buffer, which could be directly accessed from each EVAL II during parallel processing. The diagnostic interface made it possible to gather information from various perspectives about things like machine dynamic characteristics.
Later, the EVLIS machine was further enhanced and expanded, and today is stored in the Electronic Computer Special Materials Room of the Osaka University Faculty of Engineering.
(Material compiled from: Yasui, Hiroshi : "EVLIS Machine", Information Processing Vol. 43, No. 2, pp. 121-122(2002).
