【NEC】NEAC-L2

An NEC research laboratory in 1961 set out the development concept for the NEAC-L2, an ultra-high-speed, large-scale computer that was the focus of a multiyear base research project. Development was divided into three phases. In the first phase, the central unit was developed, after which memory capacity and peripheral devices were expanded and improved. The first phase was completed in June 1964. Kobayashi Ryo invented the high-speed current-switching circuitry for the core circuits, which were the heart of the computer. With this innovation and Ge transistors, a clock frequency of 30 MHz was obtained. The NEAC-L2 was hailed at the time for its cutting-edge acceleration techniques and hardware. Some examples of these are listed below:

• Simultaneous processing of multiple instructions
• Interlacing for higher memory-unit performance
• Multiprogramming
• Method for program interrupts
• 10 MHz, two-phase core logic circuits
• 40-bit, 100 ns adde
• 100 ns tunnel-diode memory units (used as registers)
• Magnetic core memory with non-destructive reads and a 1μs cycle time (used as main memory)

This project produced a large amount of valuable data and experience, which proved useful in later large-scale computer development.