In July 1987, NEC marketed a compact general-purpose small machine called the ACOS System 3300 (hereafter referred to as the S3300) as the successor of the ACOS System 410. The S3300 achieved a smaller size by employing CMOS throughout -- using fully-custom CMOS LSI with 30,000 gates per chip for the arithmetic processor (EPU), and CMOS VLSI in input-output processors and peripheral control processors -- and employing 3-dimensional mounting based on surface-mounted and double-sided mounted SIMs (Single Inline Modules) for 1-megabit DRAM chips in the main memory unit.
As a mid-size machine, NEC marketed the ACOS System 3400 (hereafter referred to as the S3400) as the successor of the ACOS System 430 in July 1988. The S3400 was a mid-size general-purpose computer which had a very compact CPU cabinet (housing the CPU and peripheral processing unit) with a set-up area of 0.68 square meters and a height of 1.3 meters, greater compactness with a height of 1.3 meters, and an improved cost-performance ratio. This was achieved by employing the latest VLSI technology -- such as high-speed ultra high-integration custom CMOS VLSI with 50,000 gates per chip and a delay time of 0.7 nanoseconds per gate, and high-speed high-integration CMOS gate arrays with 24,000 gates per chip and a delay time per gate of 1 nanosecond -- as well as high-density mounting technology such as VLSI surface mounting and 3-dimensional mounting of memory.
As a large machine, NEC marketed a compact high-performance computer, the ACOS System 3600 (hereafter referred to as the S3600) as the successor of the ACOS System 610 and 630 in February 1990. The S3600 achieved smaller size, and compared to the ACOS system 610 and 630, it reduced set-up area of the central processing unit to about one-half, cut power consumption to about one-third, and improved arithmetic processing speed by about 2.3 to 3 times. This was achieved by employing (for the first time in the arithmetic processing unit of a general-purpose large computer) BiCMOS logic elements having the characteristics of high-speed and low power consumption, and CMOS logic elements having the characteristics of high-integration and low power consumption, and by using 4-megabit DRAM for the first time in the main memory unit of a general-purpose computer.
Throughput of the entire system was raised by improving the overall transfer speed of the input-output processing unit to a maximum of 400 megabytes per second.
A high-reliability system was also achieved by, for example, using a "reciprocal standby system" where multiple host computers performed online processing, and at the same time acted as each other's standby system to provide back-up processing in case of failure.
|Announcement date||July 1987||July 1988||February 1990|
|Number of arithmetic processing units||Max.2||Max.2||Max.4|
|Main memory capacity||Max.60MB||Max.96MB||Max.384MB|
|Number of channels||Max. 26||Max.32||Max.96|
|Overall data transfer capacity||21MB/s||Max.80MB/s||Max.400MB/s|
|Memory element||1Mbit DRAM,||4Mbit DRAM|