The idea here was to develop a higher level series inheriting the system configuration of the compact DIPS and thereby expand into a range of applications involving greater scale and performance. In the DIPS-V Enhanced Series, the CPU was an improved version of the DIPS-V20 hardware. The aim for the DIPS-V30 was 2 to 3 times the performance of the V20, and this was achieved at the research center of the Nippon Telegraph and Telephone Public Corporation (now NTT). The DIPS-V30 was introduced for commercial use at the end of 1985.
To respond to further progress in technology and for greater use in the field of small-scale information processing, the V30 was further upgraded. The V30E was developed at the end of 1987, the V30EX at the end of 1989, and the V40EX at the end of 1992 (Main Specifications of DIPS-V Series E machines).
Lower level series were also developed, in another line of development from the V20, to achieve more distributed processing and to economically achieve application of information processing at smaller scales. Here, the interfaces of a diverse range of peripheral devices were implemented in corresponding adapter boards, and connection control functions for communication were implemented on communication boards, thus enabling control of the communication system and peripheral system with a single IOP and achieving a simpler configuration. After the introduction of the desktop-type V30S (completed at the end of 1986), the V30SX was developed in 1987 and the V40SX in 1991 (Main Specifications of DIPS-V Series S Machines).
| Item | V30 | V30E | V30EX | V40EX |
(Refe- rence) DIPS -V20 |
|||
|---|---|---|---|---|---|---|---|---|
|
*Performance (DIPS-11/10 ratio) |
0.6 | 0.8 | 1.2 | 2.5 | 0.3 | |||
| *System | Number of CPUs | 2 | 2 | 2 | 2 | 2 | ||
|
Maximum main memory capacity (MB) |
16 | 16 | 64 | 255 | 16 | |||
|
Peripheral control/ Communi- cation control processors |
Types | 4 *1 | 4 | 4 | 3 | 4 *1 | ||
| Quantity | 4 | 4 | 4 | 4 | 4 | |||
| Service processor | 1 | 1 | 1 | 1 | 1 | |||
|
*Proces- sing unit (CPU) |
Number of instructions | 166 | 166 | 168 | 169 | 164 | ||
| Main logic elements (G/chip) | 80K CMOS VLSI | 80K CMOS VLSI | 100K CMOS VLSI | 140K CMOS VLS1 | 20K CMOS VLSI | |||
| *Memory unit (MEM) | Expansion unit (MB) | 4 | 4 | 8/16 | 16/32 | 2/4 | ||
| Memory elements (B/chip) |
IM DRAM |
IM DRAM |
4M DRAM |
16M DRAM |
256K DRAM |
|||
|
Communi- cation control |
Lines |
Maximum accom- modated number of lines |
128 | 128 | 128 |
128/256 *4 |
128 | |
| Line speed (B/S) |
100~ 48K |
100~ 64K |
100~ 64K |
100~ 64K/ 100~ 1.5M *4 |
100~ 48K |
|||
| LAN | Speed (MB/S) | - | 1/10 | 1/10 | 1/10 | - | ||
| Items | V30S | V30SX | V40SX |
(Reference) DIPS-V20 |
|||
|---|---|---|---|---|---|---|---|
|
*Performance (DIPS-11/10 ratio) |
0.5 | 0.7 | 1.4 | 0.3 | |||
| *System | Number of CPUs | 1 | 1 | 2 | 2 | ||
|
Maximum main memory capacity (MB) |
16 | 64 | 223 | 16 | |||
|
Peripheral control/ Communi- cation control processors |
Types | 1 | 1 | 1 | 4 *1 *2 | ||
| Quantity | 1 | 1 | 2 | 4 | |||
| Service processor | 1 | 1 | 1 | 1 | |||
|
*Proces- sing unit (CPU) |
Number of instructions | 166 | 168 | 169 | 164 | ||
| Main logic elements (G/chip) | 80K CMOS VLSI | 100K CMOS VLSI | 110K CMOS VLSI | 20K CMOS VLSI | |||
| *Memory unit (MEM) | Expansion unit (MB) | 8 | 8 | 16 | 2/4 | ||
| Memory elements (B/chip) | 1M DRAM | 1M DRAM | 4M DRAM | 256K DRAM | |||
|
Communi- cation control |
Lines |
Maximum accom- modated number of lines |
64 | 64 | 256 | 128 | |
| Line speed (B/S) | 100~48K | 100~64K | 100~1.5M *4 | 100~48K | |||
| LAN | Speed (MB/S) | - | 1/10 | 1/10 | - | ||
*1: 4-line serial interface control
*2: RS-232C/GPIB interface control
*3: RS-422A/Centronix/SCSI interface control
*4: Line control section mode is emulation mode or native mode
