Uraki Tsuneo was born on May 12, 1936. He was graduated from the Department of Physics, School of Science, University of Tokyo in 1959. At graduation study, he joined Takahasi Hidetosi ’s Laboratory and studied the Parametron Compuer PC1,which had been just completed at the Takahasi Laboratory. He joined Hitachi Ltd. and was engaged mainly in development of computers.
At the development of Hitachi’s early main computers, HITAC8000 Series, starting in 1965 under the leadership of Takahashi Sigeru, he was assigned to the architectural design of the middle class computer HITAC8300 which was developed jointly with RCA. He was subsequently assigned to the small class computer HITAC8100.
In 1968, for the Banking online System, he designed a very simple computer H-9040 and developed a stored-program controlled branch controller first in the world , which had utilized wired-logic and paper-tape control instead of stored-program control at that time. Subsequently, he designed the architecture of Japan-first Mini-compuer HITAC-10.
He joined a preparation team for the Japanese government’s “Super-high-performance computer” project and devoted to the architectural design of memory control, utilizing virtual memory, cache memory and multi-processor. He invented a cache coherence management algorithm for multi-processor organization. This invention has been widely adopted in many multi-processor systems in the world, and he was awarded the Minister of Industrial Trade and Industry Prize from Japan Invention Association in 1985. In 1969, he joined the DIPS1 project of NTT and participated in the development of architectural specifications.
At the development of HITAC M Series, starting in 1972, he was in charge of high-end model M-180. The export version of M-180 was distributed by a US company to many countries over the world and played a starting point role in export business of Hitachi computer. Subsequently, he was in charge of product planning of computer products, and promoted the developments of many various products.
In 1977, he was assigned to the leader of systematization project of information system, corresponding to very high growth and expansion of information system and promoted the developments of Hitachi’s Network Architecture and Kanji Extension of Information System.
In 1995, he retired from Hitachi Ltd. as Chief Engineer. In 1999, he was appointed Professor, School of Media Science, Tokyo University of Technology.
He has been active in the Information Society of Japan(IPSJ) and served as its Director/Senior Director during 1980-1981. He has been also active in Society’s Standardization activity and served as Director of Information Technology Standards Commission during 1986-1989, and was awarded a prize in 1998. He has been interested in the history of computing, being a member of the special committee on the history of computing since 1981.