Japanese Computer Pioneers

Moto-Oka TohruMoto-Oka Tohru

Moto-Oka Tohru was born on April 7th, 1929 in Tokyo, graduated the Department of Electrical Engineering, The University of Tokyo in 1952, appointed to the Associate Professor in 1957, the Professor in 1967 of the University and the director of the Computer Center of the University of Tokyo in 1985, and died in November 1985.

He involved in the development of computer TAC in 1952 at Yamashita laboratory of Faculty of Engineering, made research of magnetic logic devices and numerical control, received the Ohkouchi Memorial Technology Award in 1960 and 1964 for his research of numerical control of machine tools.

He was involving in the research of super high speed circuit technology as a visiting associate professor at the Digital Computer Research Center of Illinois University for 2 years from 1961. He received the Director General Award of Science and Technology in the recognition of "Pulse Distribution System and Others" in 1965, and Paper Award of Information Processing Society for "Consideration of Operating System Description" in 1974. In the area of automatic logic design, he worked for several years as the chair of a special committee at the Japan Electronic Industry Development Association, was involving in the research of character recognition and standardization of code set, built the special technology committee of Japanese language processing there in 1977, was assigned the chair of committee of OA equipment standardization in 1984 and the chair of the sectional meeting of standardization management board of Japanese language processing technology in 1985. He exerted himself for the Japan local chairman of ISO/TC97/SC16 from 1977 and of SC21 from 1984.

From 1970, he made a lot of research in the area of computer architecture such as functionally distributed machine through dynamic microprogramming PPS-1, function level dataflow machine TOPSTAR which controlled the work load such as job processing and job allocation processing through dataflow mechanism, associative processing system with multi-dimensional memory DREAM, parallel inference engine with unification hardware PIE, high speed database machine GRACE which parallelized join processing efficiently, and brought up many excellent researchers. He received the MITI Minister Award for Information Promotion Contribution in the recognition of "Contribution to the Computer Technology Research and the Development of Information Processing Technology".

In 1978, he built an investigation committee of the Fifth Generation Computer Systems Development and made up a research and development plan of totally new computer systems based on the human inference mechanism. This plan was realized formally as a project of MITI in 1982. He directed this famous project as the chairman of Development Promotion Committee of Basic Computer Technology, and made success in International Conferences on Fifth Generation Computer Systems such as FGCS81 and FGCS84. Moreover, he worked as the chair of working party for the Supercomputer System at the Industry Technology Council of MITI and served the general chairmen of International Conference on VLSI and of International Conference of Computer Hardware Description Language 2 months before his death despite of his disease. This FGCS project continued until 1992 (1994 including the evaluation period), bore fruits in terms of Parallel Inference Machine PIM which was equipped with the parallel operating system PIMOS for parallel inference language KL-1, and opened up many research fields such as parallel logic programming, inductive inference, inference system for law and automatic program synthesis.

In 1985, the Moto-Oka memorial association was founded by his friends and pupils. The Moto-Oka award ceremony had been held as its activity until 1993. The awards were given to 41 young researchers in the fields mentioned above.

(Tanaka Hidehiko)